1. Field of the Invention
The present invention generally relates to analog-to-digital converters and it particularly relates to an analog-to-digital converter in which analog signals are converted to digital signals in such a manner that the analog signal is converted a plurality of times.
2. Description of the Related Art
As an example of a circuit for converting the inputted analog signals into the digital signals, there is available a pipeline-type A-D converter. A pipeline-type A-D converter is configured such that sub-A-D converters of low bits are connected in a plurality of stages. The inputted analog signal is A-D converted in stages through the respective sub-A-D converters. Each sub-A-D converter is provided with a plurality of comparators, and each comparator compares the inputted analog signal with the reference voltage so as to convert the analog signal into the digital signals.
In the analog-to-digital converter, the enhancement of the conversion accuracy and the reduction of the power consumption are both desired. However, the enhancement of the conversion accuracy and the reduction of the power consumption are generally in a trade-off relation to each other. In the light of this trade-off relation, a structure that realizes the both has been a major issue.